Back To Search Result

R&D Engineer, I

  • Electronics
  • 03 Dec 2018 09:50 AM
  • New

Specification

Job ID 201812030017
Salary -
Location Noida, Uttar Pradesh
Contact Detail Synopsys, ,

Description

Job Description:
Would be part of the team performing verification of complex IPs, developing custom verification IPs. Person would be working on different phases of functional verification, including Test plan, coding, test execution, coverage etc.
The responsibilities would also include enhancement of the existing verification environment, analyzing customer’s target environment, usage, problems and help them with debugging and providing solutions.
Skill Required:
  • Knowledge of Verilog, System Verilog
  • Strong Fundamentals of Digital electronics
  • C or Verilog programming
  • Exposure of bus protocols either AMBA AHB & AXI / USB / PCIe etc
  • Exposure to any verification methodology (VMM, OVM, UVM)